The present invention relates to transistor amplifiers, and more particularly to a translinear f.sub.T multiplier transistor amplifier that allows for variable transition times.
Prior basic multiplier configurations include the Gilbert Multiplier, described with respect to FIG. 9 in U.S. Pat. No. 3,931,583 issued Jan. 6, 1976 to Barrie Gilbert entitled "Wideband Differential Amplifier", which is a four-quadrant multiplier, and the f.sub.T doubler, described in U.S. Pat. No. 3,633,120 issued Jan. 4, 1972 to Carl R. Battjes entitled "Amplifier Circuit", which alternatively doubles the f.sub.T characteristic or the gain of a common emitter-connected transistor amplifier. One limitation of these f.sub.T multiplier configurations in regard to thier use in pin driver output stages, where the amplifier is fully switched from one end of its range to the other, is that they do not allow for variable transition times since the amplifiers are very nonlinear at the extremes of their operating range.
What is desired is an f.sub.T multiplier transistor amplifier configuration that is reasonably linear so it can accommodate virtually any transition time required, from a minimum time to as long as needed.